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元器件交易网ADV7171KSUZ数据手册

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核心提示:  GENERAL DESCRIPTION  The ADV7170/ADV7171 are integrated digital video encoders that convert digital CCIR-601 4:2:2

  GENERAL DESCRIPTION

  The ADV7170/ADV7171 are integrated digital video encoders that convert digital CCIR-601 4:2:2 8- or 16-bit component video data into a standard analog baseband television signal compatible with worldwide standards.

  The on-board SSAF (super sub-alias filter) with extended luminance frequency response and sharp stop band attenuation enables studio-quality video playback on modern TVs, giving optimal horizontal line resolution.

  An advanced power management circuit enables optimal control of power consumption in both normal operating modes and power-down or sleep modes.

  TheADV7170/ADV7171 support both PAL and NTSC square pixel operation. The parts also incorporate WSS and CGMS-A data control generation.

  The output video frames are synchronized with the incoming data timing reference codes. Optionally, the encoder accepts and can generate , HSYNC VSYNC, and FIELD timing signals. These timing signals can be adjusted to change pulse width and position while the part is in the master mode. The encoder requires a single, two-times pixel rate (27 MHz) clock for standard operation. Alternatively, the encoder requires a 24.5454 MHz clock for NTSC or 29.5 MHz clock for PAL square pixel mode operation. All internal timing is generated on-chip.

  A separate teletext port enables the user to directly input teletext data during the vertical blanking interval.

  The ADV7170/ADV7171 modes are set up over a 2-wire, serial bidirectional port (I2C-compatible) with two slave addresses.

  Functionally, the ADV7170 and ADV7171 are the same with the exception that the ADV7170 can output the Macrovision anticopy algorithm.

  The ADV7170/ADV7171 are packaged in a 44-lead MQFP package and a 44-lead TQFP package.

 
 
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