SN65MLVD201D   FEATURES
　　D Low-Voltage Differential 30 to 55 Line
　　Drivers and Receivers for Signaling Rates(1)
　　Up to 200 Mbps
　　D Type-1 Receivers Incorporate 25 mV of
　　Hysteresis
　　D Type-2 Receivers Provide an Offset
　　(100 mV) Threshold to Detect Open-Circuit
　　and Idle-Bus Conditions
　　D Meets or Exceeds the M-LVDS Standard
　　TIA/EIA-899 for Multipoint Data Interchange
　　D Power Up/Down Glitch Free
　　D Controlled Driver Output Voltage Transition
　　Times for Improved Signal Quality
　　D -1 V to 3.4 V Common-Mode Voltage Range
　　Allows Data Transfer With 2 V of Ground
　　Noise
　　D Bus Pins High Impedance When Disabled or
　　VCC  1.5 V
　　D 100-Mbps Devices Available
　　(SN65MLVD200, 202, 204, 205)
　　APPLICATIONS
　　D Low-Power High-Speed Short-Reach
　　Alternative to TIA/EIA-485

　　SN65MLVD201D DESCRIPTION
　　The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30, and incorporates controlled transition times to allow for stubs off of the backbone transmission line. These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of -1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from -40°C to 85°C.SN65MLVD201D